The present invention relates to a multi-chip package device including a semiconductor memory chip, and particularly to a test circuit for a read only memory (ROM) chip having a floating gate.
In this type of circuit that has heretofore been used, a high voltage is applied to a terminal for inputting a signal such as an address to thereby assert a test circuit select signal so as to select a test circuit. An input terminal A corresponds to a suitable input terminal of a memory chip. Unless otherwise stated below in the present Specification, “L” indicates a ground level, and “H” indicates a power supply voltage level, respectively. Further, “HV” indicates a high voltage level for selecting a test circuit.
However, the conventional test circuit selecting method is predicated on the fact that it is possible to externally make direct contact with a terminal to which the high voltage level “HV” is applied. On the other hand, there may be cases where in a commercial product based on a multi-chip package (MCP) technology for laminating a plurality of chips into one package, the high voltage level “HV” cannot be externally applied to the above terminal. When, for example, a serial interface product is constituted by an MCP of a serial interface chip and a general purpose memory chip, it is not feasible to make contact with all of input terminals of a general purpose memory from outside.